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2THE80x86MICROPRO__SSOR
2.1BRIEFHISTORYOFTHE80x86FAMILY表2‑1EvolutionofIntel’sMicropro__ssorsProduct80808085808680888028680___80___Yearintrodu__d19741976197819791982198519__ClockrateMHz2-33-85-105-86-1616-3325-50No.transistors
4500650029000290001300002750001.2millionPhysicalmemory64K64K1M1M16M4G4GInternaldatabus881616163232Externaldatabus88168163232Addressbus16162020243232Datatypebits
8881681681681632816322.2INSIDETHE8088/8086图2‑1InternalBlockDiagramofthe8088/86CPU
2.
2.1Pipelining流水线操作图2‑2Pipelinedvs.Non-pipelinedExecutionIntelimplementedthecon__ptofpipelininginthe8088/86bysplittingtheinternalstructureofmicropro__ssorintotwosections:theexecutionunitEUandthebusinte_____unitBIU.TheBIUac__ssesmemoryandperipheralswhiletheEUexecutesinstructionspreviouslyfetched.ThisworksonlyifBIUkeepsaheadoftheEUthustheBIUofthe8088/86hasabuffer.Thebufferis4byteslonginthe8088and6bytesinthe
8086.Ifanyinstructiontakestoolongtoexecutethequeueisfilledtoits__ximumcapacityandthebuswillsetidle.TheBIUfetchesanewinstructionwheneverthequeuehasroomfor2bytesinthe6-byte8086queueandfor1byteinthe4-bytes8088queue.Pipelininginthe8088/86hastwostages:fetchandexecution.
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2.2RegistersIntheCPUregisterareusedtostoreinfor__tiontemporarily.图2‑3register表2‑2Registersofthe8086/286byCategoryCategoryBitsRegisterNameGeneral16AXBXCXDX8AHALBHBLCHCLDHDLPointer16SPstackpointerBPbasepointerIndex16SIsour__indexDIdestinationindexSegment16CScodesegmentDSdatasegmentSSstacksegmentESextrasegmentInstruction16IPinstructionpointer)Flag16FRflagregister
2.3INTRODUCTIONTOASSEMBLYPROGRAMMINGWhiletheCPUcanworkonlyinbinaryitcandosoatveryhighspeeds.Howeveritisquitetedious(单调乏味的)andslowforhu__nstodealwith0sand1sinordertoprogramthecomputer.Aprogramthatconsistsof0sand1siscalled__chinelanguageandintheearlydaysofthecomputerprogrammersactuallycodedprogramsin__chinelanguage.Eventuallyassemblylanguagesweredevelopedwhichprovidedmnemonics记忆术forthe__chinecodeinstructionplusotherfeaturesthat__deprogrammingfasterandlesspronetoerror.Thetermmnemonicisfrequentlyusedincomputerscien__andengineeringliteraturetorefertocodesandabbreviationsthatarerelativelyeasytoremember.Assemblylanguageprogramsmustbetranslatedinto__chinecodebyaprogramcalledassembler.Assemblylanguageisreferredtoalow-levellanguagebecauseitdealsdirectlywiththeinternalstructureoftheCPU.ToprograminassemblylanguagetheprogrammermustbeknowthenumberofregistersandtheirsizeaswellasotherdetailsoftheCPU.Todayonecanuse__nydifferentprogramminglanguagessuchasPascalBASICCandnumerousothers.Theselanguagesarecalledhigh-levellanguagesbecausetheprogrammerdoesnoth__etobecon__rnedwiththeinternaldetailsoftheCPU.High-levellanguagesaretranslatedinto__chinecodebyaprogramcalledcompiler.
2.4INTRODUCTIONTOPROGRAMSEGMENTAtypicalassemblyprogramconsistsofatleastthreesegments:acodesegmentadatasegmentastacksegmentAsegmentisanareaofmemorythatincludesupto64Kbytesandbeginsonanaddressevenlydivisibleby16suchasanaddressendsin0H.Thesegmentsizeof64Kbytescameaboutbecausethe8085micropro__ssorcouldaddressa__ximumof64Kbytesofphysicalmemorysin__ithadonly16pinsfortheaddresslines216=64K.Thislimitationwascarriedintothedesignofthe8088/8086toensurecompatibility.Whereasinthe8085therewasonly64Kbytesofmemoryforallcodedataandstackinfor__tioninthe8088/86therecanbeupto64Kbytesofmemoryassignedtoeachcategory.Withinanassemblylanguageprogramthesecategoriesarecalledthecodesegmentdatasegmentandstacksegment.
2.
4.1LogicaladdressandphysicaladdressInIntelliteraturecon__rningthe8086therearethreetypesofaddressesmentionedfrequently:thephysicaladdresstheoffsetaddressthelogicaladdressThephysicaladdressisthe20-bitaddressthatisactuallyputontheaddresspinsof8086micropro__ssoranddecodedbythememoryinte___cingcircuitry.Theaddresscanh__earangeof00000HtoFFFFFH.ThisisactualphysicallocationinRAMorROMwithin1megabytememoryrange.Theoffsetaddressisalocationwithina64K-bytesegmentrange.Thereforeanoffsetaddresscanrangefrom0000HtoFFFFH.Thelogicaladdressconsistsofasegmentvalueandanoffsetaddress.
2.
4.2CodesegmentThecodesegmentcontainstheassemblylanguageinstructionsthatperformthetasksthattheprogramwasdesignedtoaccomplish.Toexecuteaprogramthe8086fetchtheinstructionsopcode操作码andoperand操作数fromthecodesegment.ThelogicaladdressofaninstructionalwaysconsistsofaCSandanIPshowninCS:IPfor__t.AssumevaluesinCSandIPasshowninthediagram.�250095F3:CSIP2500250002E5F
31.startwithCS
2.shiftleftCS
3.addIP图2‑4Σ物理地址段基址偏移地址00003210150150190图2‑5Example:IfCS=24F6HandIP=634AHshow:athelogicaladdressbtheoffsetaddressandcalculate:cthephysicaladdressdthelowrangeetheupperrangeofthecodesegment.Solution:a24F6:634Ab634Ac2B2AA24F60+634Ad24F6024F60+0000e34F5F24F60+FFFF
2.
4.3Logicaladdressvs.physicaladdressinthecodesegmentInthecodesegmentCSandIPholdthelogicaladdressoftheinstructionstobeexecuted.Thefollowingarethephysicaladdressandthecontentsofeachlocationforaprogram.Rememberthatitisthephysicaladdressthatisputontheaddressbusbythe8086CPUtobedecodedbythememorycircuitry.assemblylanguagemnemonicsandoperandCodeSegmentB01132:01021132:01041132:01061132machinelanguageopcodeandoperandlogicaladdressCS:IP1132:0000xxphysicaladdress1142057B686B27289D188C7B39FB42001D001D905351F1132:010011320CS0100IP…1132:01081132:010A1132:010C1132:010E1132:01101132:0112xx1132:FFFF…moval57addax1F35movdh86movdl72movbhalmovcxdxmovbl9Fmovah20addaxdxaddcxbx2131F1142111422114231142411425114261142711428114291142A1142B1142C1142D1142E1142F1143011431114321143311434图2‑
62.
4.4DatasegmentThedatasegmentisusedtostoreinfor__tiondatathatneedstobepro__ssedbytheinstructionsinthecodesegment.�1A5000xx04图2‑7AssumethatDSis5000andtheoffsetis
1950.Calculatethephysicaladdressofthebyte.�50001950:DSoffset
500050000519501.startwithDS
2.shiftleftDS
3.addoffset图2‑
82.
4.5ExtrasegmentESisasegmentregisterusedasanextradatasegment.Althoughin__nynor__lprogramsthisisnotuseditsuseisabsolutelyessentialforstringoperations.
2.
4.6StacksegmentThestackisasectionofread/writememoryRAMusedbytheCPUtostoreinfor__tiontemporarily.TheCPUneedsthisstorageareasin__thereareonlyalimitednumberofregisters.Theremustbesomepla__fortheCPUtostoreinfor__tionsafelyandtemporarily.WhynotdesignaCPUwithmoreregistersIfthestackisasectionofRAMtheremustberegistersinsidetheCPUtopointtoit.Thetwo__inregistersusedtoac__ssthestackaretheSSstacksegmentregisterandtheSPstackpointerregister.Theseregistersmustbeloadedbeforeanyinstructionsac__ssingthestackareused.Everyregistersinsidethe80x86ex__ptsegmentregistersandSPcanbestoredinthestackandbroughtbackintotheCPUfromthestackmemory.ThestoringofaCPUregisterinthestackiscalledapushandloadingthecontentsintotheCPUregisteriscalledapop.Exampleofpushingontostack:AssumingthatSP=1236AX=24B6DI=85C2andDX=5F93showthecontentsofthestackaseachofthefollowinginstructions:pushaxpushdipushdx��StackSegment�StackSegment�CodeSegmentStackSegment�SS:1234SS…xxIPstartSP=1236……xxDataSegment…xxDSSS:FFFFafterpushaxSP=1234SS:FFFE00SS:1233afterpushdiSP=1232afterpushdxSP=1230…xx……24B6…24B6xx24StackSegmentxxxx…CSxxB6SS:123685SS:1232C2SS:123185SS:1230C2SS:12355FSP93图2‑9IllustrationofpushingthestackExampleofpoppingthestack:AssumingthatthestackisasshownbelowandSP=18FAshowthecontentsofthestackregistersaseachofthefollowinginstructionsisexecuted:popcxpopdxpopcx��StackSegment�StackSegment�StackSegment�CodeSegmentxxIP…DataSegment…xx…StackSegment00xxxxxx…CS…DSSSSS:FFFFSS:FFFESS:1900SS:18FESS:18FDSS:18FCSS:18FBSS:18FASS:18FFSPstartSP=18FAafterpopcxSP=18FCCX=1423afterpopdxSP=18FEDX=2C6BafterpopbxSP=1900CX=F691xx6B2Cxxxx91F6…………23146B2C91F691F6图2‑10Illustrationofpoppingthestack
2.
4.7Afewmorewordsaboutsegmentsinthe80x86Canasinglephysicaladdressbelongto__nydifferentlogicaladdressesYES!Lookatthecaseofaphysicaladdressvalueof15020Hthereare__nypossiblelogicaladdressesthatrepresentthissinglephysicaladdress:表2‑3__nylogicaladdressandasinglephysicaladdressLogicaladdresshexPhysicaladdresshex1000:5020150201500:0020150201502:0000150201400:1020150201302:200015020Thisshowsthedynamicbeh__iorofthesegmentandoffsetcon__ptinthe8086CPU.Onelastpointthatmustbeclarifiedisthecasewhenaddingoffsettotheshiftedsegmentregisterresultsinanaddressbeyondthe__ximumallowedrangeofFFFFFH.Inthissituationwrap-aroundwilloccur.Thisisshowninthefollowingexample:Example:WhatistherangeofphysicaladdressifCS=FF59allvaluesareinhexSolution:ThelowrangeisFF590FF590+
0000.ThehighrangegoestoFFFFFandwrapsaroundfrom00000to0F58FFF590+FFFF=10F58Fwhichisillustratedbelow:FF5900F58F00000FFFFF图2‑11Illustrationofthewrap-around
2.
4.8OverlappingIncalculatingthephysicaladdressitispossiblethattwosegmentscanoverlapwhichisdesirableinsomecircumstan__s.ForexampleoverlappingisusedinCOMfiles.�25000CS=2500codeSegment34FFFstackSegmentdataSegment632107320F82100920FFDS=6321SS=821030000CS=3000codeSegmentstackSegmentdataSegment3FFFF40500504FF500005FFFFDS=4050SS=5000NonoverlappingsegmentsOverlappingsegments图2‑12Nonoverlappingvs.overlappingsegments图2‑13DOSwindow
2.5FlagregisterR13R12OF11DF10IF9TF8SF7ZF6U5R14R15AF4U3PF2U1CF0R=reservedU=undefinedOF=overflowflagDF=directionflagIF=interruptflagTF=trapflagSF=signflagZF=zeroflagAF=auxiliaryflagPF=parityflagCF=carryflag图2‑14Flagregister
2.
5.1CFtheCarryFlagThisflagissetwheneverthereiscarryouteitherfromd7afteran8-bitoperationorfromd15afterfrom16-bitoperation.
2.
5.2PFParityFlagAfter__rtainoperationstheparityoftheresult’slow-orderbyteischecked.Ifthebytehasanevennumberof1stheparityflagissetto1otherwiseitisclearedsetequaltozero.
2.
5.3AFAuxiliaryFlagIfthereisacarryfromd3tod4ofanoperationthisbitissetotherwiseitiscleared.ThisflagisusedbyinstructionsthatperformBCDbinarycodeddeci__larithmetic.
2.
5.4__ZeroFlagThezeroflagsetto1iftheresultofarithmeticorlogicaloperationiszerootherwiseitiscleared.
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5.5SFSignFlagBinaryrepresentationofsignednumbersusesthemostsignificantbitasthesignbit.AfterarithmeticorlogicaloperationsthestatusofthissignbitiscopiedintotheSFtherebyindicatingthesignoftheresult.
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5.6TFTrapFlagWhenthisflagissetitallowtheprogramtothesingle-stepmeaningtoexecuteoneinstructionatatime.Single-stepisusedfordebuggingpurpose.
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5.7IFInterruptFlagThisflagissetorclearedtoenableordisableonlytheexternal__skableinterruptrequests.
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5.8DFDirectionFlagThisbitisusedtocontrolthedirectionofstringoperations
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5.9OFOverflowFlagThisflagissetwhenevertheresultofasignednumberoperationistoolargecausingthehigh-orderbittooverflowintothesignbit.Ingeneralthecarryflagisusedtodetecterrorsinunsignedarithmeticoperations.Theoverflowflagisonlyusedtodetecterrorsinsignedarithmeticoperations.
2.
5.10AnexampleoftheuseoftheflagbitsInthissectionweexaminetheimpactoftheADDinstructionontheflagregister.TheflagbitaffectedbytheADDinstructionare:CFPFAF__SFOFExample:Showhowtheflagregisterisaffectedbytheadditionof38Hand2FH.Solution:movbh38h;BH=38Haddbh2fh;add2FtoBHnowBH=67H3800111000+2F00101111-----------6701100111CF=0sin__thereisnocarrybeyondd7PF=0sin__thereisanoddnumberof1sintheresultAF=1sin__thereisacarryfromd3tod4__=0sin__theresultisnotzeroSF=0sin__d7oftheresultiszeroExample:Showhowtheregisterisaffectedbymoval9ch;AL=9CHmovdh64h;DH=64Haddaldh;nowAL=0Solution:9C10011100+6401100100-----------0000000000CF=1sin__thereisacarrybeyondd7PF=1sin__thereisanevennumberof1sintheresultAF=1sin__thereisacarryfromd3tod4__=1sin__theresultiszeroSF=0sin__d7oftheresultiszeroExample:Showhowtheregisterisaffectedbymovax34f5h;AX=34f5Haddax95ebh;nowAX=cae0hSolution:34f50011010011110101+95eb1001010111101011-----------------------cae01100101011100000CF=0sin__thereisnocarrybeyondd15PF=0sin__thereisanoddnumberof1sinthelowerbyteAF=1sin__thereisacarryfromd3tod4__=0sin__theresultisnotzeroSF=1sin__d15oftheresultisone
2.680x86ADDRESSINGMODESTheCPUcanac__ssoperandsdatainvariouswayscalledaddressingmodesthenumberofaddressingmodesisdeterminedwhenthemicropro__ssorisdesignedandcannotbechanged.The80x86providersatotalofsevendistinctaddressingmodes:RegisterImmediateDirectRegisterindirectBasedrelativeIndexedrelativeBasedindexedrelative
2.
6.1Registeraddressingmode寄存器寻址方式Theregisteraddressingmodeinvolvestheuseofregisterstoholdthedatatobe__nipulated.Memoryisnotac__ssedwhenthisaddressingmodeisexecuted;thereforeitisrelativelyfast.Examplesofregisteraddressingmodefollow:movbxdx;copythecontentsofDXintoBXmovesax;copythecontentsofESintoAXaddalbh;addthecontentsofBHtocontentsofALItshouldbenotedthatthesour__anddestinationregistersmustbe__tchinsize.Inotherwordscoding”movclax”willgiveanerrorsin__thesour__isa16-bitregisterandthedestinationisan8-bitregister.
2.
6.2Immediateaddressingmode立即数寻址方式Intheimmediateaddressingmodethesour__operandisaconstant.Inimmediateaddressingmodeasthenameimplieswhentheinstructionisassembledtheoperandcomesimmediatelyaftertheopcode.Forthisreasonthisaddressingmodeexecutedquickly.Howeverinprogrammingithaslimiteduse.Immediateaddressingmodecanbeusedtoloadinfor__tionintoanyoftheregistersex__ptthesegmentregistersandflagregisters.Example:movax2550h;move2550hintoAXmovcx625;loadthedeci__lvalue625intoCXmovbl40h;load40hintoBLTomoveinfor__tiontothesegmentregistersthedatamustfirstbemovedtoageneral-purposeregistersandthentothesegmentregister.Example:movax2550hmovdsaxmovds0123h;illegal!!!
2.
6.3Directaddressingmode直接寻方式Inthedirectaddressingmodethedataisinsomememorylocationsandtheaddressofthedatainmemorycomesimmediatelyaftertheinstruction.Notethatinimmediateaddressingtheoperanditselfisprovidedwiththeinstructionwhereasindirectaddressingmodetheaddressoftheoperandisprovidedwiththeinstruction.ThisaddressistheoffsetaddressandonecancalculatethephysicaladdressbyshiftinglefttheDSregisterandaddingittotheoffsetasfollow:movdl[2400h];movecontentsofDS:2400hintoDLInthiscasethephysicaladdressiscalculatedbycombiningthecontentsofoffsetlocation2400HwithDSthedatasegmentregister.Noti__thebracketaroundtheaddress.Inabsen__ofthisbracketitwillgiveanerrorsin__itisinterpretedtomovethevalue2400H16-bitdataintoregisterDLan8-bitregister.Example:FindthephysicaladdressofthememorylocationanditscontentsaftertheexecutionofthefollowingassumingthatDS=1512H.moval99hmov[3518h]alFirstALisinitializedto99HtheninlinetwothecontentsofALaremovedtologicaladdressDS:3518Hwhichis1512H:3518H.ShiftingDSleftandaddingittotheoffsetgivesthephysicaladdressof18638H15120H+3518H=18638H.Thatmeansaftertheexecutionofthesecondinstructionthememorylocationwithaddress18368Hwillcontainthevalue99H.图2‑15Illustrationofthedirectaddressingmode
2.
6.4Registerindirectaddressingmode寄存器间接寻址方式Intheregisterindirectaddressingmodetheaddressofmemorylocationwheretheoperandresidesisheldbyaregister.TheregistersusedforthispurposeareSIDIandBPBX.IfthesethreeregistersareusedaspointersthatisiftheyholdtheoffsetofmemorylocationtheymustbecombinedwithDSinordertogeneratethe20-bitphysicaladdress.Example:moval[bx];movesintoALthecontentsofthememorylocation;pointedtobyDS:BX.Noti__theBXisinbracket.movcl[si];movecontentsofDS:SIintoCLmov[DI]ah;movecontentsofAHintoDS:DIExample:AssumethatDS=1120HSI=2498HandAX=17FEH.Showthecontentsofmemoryaftertheexecutionof:mov[si]axThecontentsofAXaremovedintomemorylocationswithlogicaladdressDS:SIandDS:SI+
1.ThereforethephysicaladdressstartatDSshiftleft+SI=13698Hlowaddress13698HcontainsFEHthelowbyteandhighaddress13699Hwillcontain17Hthehighbyte.图2‑16Illustrationoftheregisterindirectaddressingmode
2.
6.5Basedrelativeaddressingmode基址相对寻址方式InthebasedrelativeaddressingmodebaseregistersBXandBPaswellasadispla__mentvalueareusedtocalculatewhatiscalledeffectiveaddress.ThedefaultsegmentsusedforthecalculationofthephysicaladdressPAareDSforBXandSSforBP.Example:movcx[bx]+10h;moveDS:BX+10HandDS:BX+10H+1intoCX;PA=DSshiftleft+BX+10HAlternativecodingsaremovcx[bx+10h]andmovcx10h[bx]图2-17IllustrationofthebasedrelativeaddressingmodeAgainthelowaddresscontentswillgointoCLandhighaddresscontentswillgointoCH.moval[bp]+5;PA=SSshiftleft+BP+5moval[bp+5]moval5[bp]
2.
6.6Indexedrelativeaddressingmode变址相对寻址Theindexedrelativeaddressingmodeworksthesameasbasedrelativeaddressingmodeex__ptthatregisterDIandSIholdtheoffsetaddress.Example:movdx[si]+5;PA=DSshiftleft+SI+5movcl[di]+20;PA=DSshiftleft+DI+20Example:AssumethatDS=4500HSS=2000HBX=2100HSI=1___HDI=8500HBP=7814HandAX=
2512.ShowtheexactphysicalmemorylocationwhereAXisstoredineachthefollowingallvaluesareinhex.amov[bx]+20axbmov[si]+10axcmov[di]+4axdmov[bp]+12axSolution:aDS:BX+20PA=45000+2100+20location47120=12and47121=25bDS:SI+10PA=45000+1___+10location46496=12and46497=25cDS:DI+4PA=45000+8500+4location4D504=12and4D505=25dSS:BP+12PA=20000+7814+12location27826=12and27827=
252.
6.7BasedIndexedrelativeaddressingmode基址加变址相对寻址方式Bycombiningbasedandindexedrelativeaddressingmodesanewaddressingmodeisderivedcalledbasedindexedrelativeaddressingmode.Inthismodeonebaseregisterandoneindexregisterareused.Example:movcl[bx][di]+8;PA=DSshiftleft+BX+DI+8movch[bx][si]+20;PA=DSshiftleft+BX+SI+20movah[bp][di]+12;PA=SSshiftleft+BP+DI+12movah[bp][si]+29;PA=SSshiftleft+BP+SI+29Thecodingoftheinstructionabovecanvaryforexamplethelastexamplecouldh__ebeenwritten:movah[bp+si+29]ormovah[si+bp+29];theregisterorderdoesnot__tter
2.
6.8Segmentoverrides段超越表2‑4OffsetRegistersforVariousSegmentsSegmentregisterCSDSESSSOffsetregisterIPSIDIBXSIDIBXSPBPTable表2‑4providesasum__ryoftheoffsetregistersthatcanbeusedwiththefoursegmentregistersof80x
86.The80x86CPUallowstheprogramtooverridethedefaultsegmentanduseanysegmentregister.Todothatspecifythesegmentincode.Forexample:表2‑5SampleSegmentOverridesInstructionSegmentUsedDefaultSegmentmovaxcs:[bp]CS:BPSS:BPmovdxss:[si]SS:SIDS:SImovaxds:[bp]DS:BPSS:BPmovcxes:[bx]+12ES:BX+12DS:BX+12movss:[bx][di]+32axSS:BX+DI+32DS:BX+DI+
322.
6.9Sum__ryof80x86AddressingModes表2‑6Sum__ryof80x86addressingmodesAddressingModeOperandDefaultSegmentRegisterregnoneImmediatedatanoneDirect[offset]DSRegisterindirect[BX]DS[SI][DI][BP]SSBasedrelative[BX]+dispDS[BP]+dispSSIndexedrelative[DI]+dispDS[SI]+dispBasedindexedrelative[BX][SI]+dispDS[BX][DI]+disp[BP][SI]+dispSS[BP][DI]+disp20位物理地址ES0000DSSSCS000000000000++8/16位位移量+++DIBPBXSISIDIBPBXPAGE2-21。